The present invention relates generally to magnetic memory devices, and more specifically, to encoding multiple bits in a nanowire magnetic tunnel junction via domain wall motion.
Magnetoresistive random access memory (MRAM) is a non-volatile computer memory (NVRAM) technology. Unlike conventional RAM chip technologies, MRAM data is not stored as electric charge or current flows, but by magnetic storage elements. The elements are formed from two ferromagnetic plates, each of which can hold a magnetic field, separated by a thin insulating layer. One of the two plates is a reference magnet set to a particular polarity; the other plate's field can be changed to match that of an external field to store memory and is termed the “free magnet” or “free-layer”. This configuration is known as a magnetic tunnel junction and is the simplest structure for a MRAM bit. A memory device is built from a grid of such “cells”.
One method of reading is accomplished by measuring the electrical resistance of the cell. A particular cell is (typically) selected by powering an associated transistor which switches current from a supply line through the cell to ground. Due to the magnetic tunnel effect, the electrical resistance of the cell changes due to the orientation of the magnetization in the two plates. By measuring the resistance of any particular cell, the direction of magnetization of the writable plate (i.e., the free layer) can be determined.